1. Field of the Invention
This invention relates generally to techniques for managing electronic information, and relates more particularly to an apparatus and method for effectively implementing a unified clock-recovery system.
2. Description of the Background Art
Implementing effective methods for managing electronic information is a significant consideration for designers and manufacturers of contemporary electronic devices. However, effectively managing information utilized by electronic devices may create substantial challenges for system designers. For example, enhanced demands for increased device functionality and performance may require more system processing power and require additional hardware resources. An increase in processing or hardware requirements may also result in a corresponding detrimental economic impact due to increased production costs and operational inefficiencies.
Furthermore, enhanced device capability to perform various advanced operations may provide additional benefits to a system user, but may also place increased demands on the control and management of various device components. For example, an enhanced electronic device that effectively accesses, stores, displays, and manipulates digital image data may benefit from an efficient implementation because of the large amount and complexity of the digital data involved.
Due to growing demands on system resources and substantially increasing data magnitudes, it is apparent that developing new techniques for managing information is a matter of concern for related electronic technologies. Therefore, for all the foregoing reasons, developing effective systems for managing electronic information remains a significant consideration for designers, manufacturers, and users of contemporary electronic devices.
In accordance with the present invention, an apparatus and method for effectively implementing a unified clock-recovery system are disclosed. In one embodiment, initially, an analog video signal (such as an NTSC or PAL analog video signal) may be provided from an analog transmitter to an analog-to-digital converter (ADC) in a receiver device. The ADC may responsively convert the analog video signal into a converted digital signal that preferably retains timing relationships from the analog video signal. The ADC may then preferably provide the converted digital signal to a frontend module in the receiver device.
A timestamp generator in the analog frontend module may then preferably generate a series of analog-source timestamps corresponding to the converted digital signal received from the ADC. The timestamp generator may repeatedly generate individual timestamps after a pre-defined acquisition unit of the converted digital signal has been received, starting with the beginning of an arbitrary line of video information in the converted digital signal. In certain embodiments, the timestamp generator may preferably utilize an acquisition unit that is equal to one video frame. However, in alternate embodiments, any other appropriate acquisition unit may be utilized.
A timestamp processor from the analog frontend module may then preferably extract the analog-source timestamps and store them into a local memory along with pointers to corresponding analog-source data. In certain embodiments, the timestamp processor may also perform various procedures with the analog-source timestamps to provide a processed output from the analog frontend module through a switch module to a backend clock recovery module in the receiver device. For example, in certain embodiments, the timestamp processor may utilize the analog-source timestamps to calculate a input timing reference signal for use by the backend clock recovery module.
In addition, a digital video bitstream may similarly be provided from a digital transmitter to a digital frontend module of the receiver device. The foregoing digital bitstream may preferably include a series of digital-source timestamps with timing information that corresponds to the digital bitstream. A timestamp processor from the digital frontend module may then preferably extract the digital-source timestamps, and store them into the local memory along with pointers to corresponding digital-source data.
In certain embodiments, the timestamp processor may also perform various procedures with the digital-source timestamps to provide a processed output from the digital frontend module through the switch module to the backend clock recovery module. For example, in certain embodiments, the timestamp processor may utilize the digital-source timestamps to calculate an input timing reference signal for use by the backend clock recovery module.
The switch module may preferably be controlled to select between either a processed output of the analog frontend module, or a processed output of the digital frontend module. In certain embodiments, the switch module may preferably be controlled in response to an input signal selection made by a system user of the receiver device. The switch module may thus responsively provide the processed output of either the analog frontend module or the digital frontend module to the backend clock recovery module as an input timing reference signal.
In accordance with the present invention, the backend clock recovery module may selectively utilize the processed output of either the analog frontend module or the digital frontend module to control a voltage-controlled clock oscillator to thereby generate a local clock. In certain embodiments, the backend clock recovery module may preferably generate a series of output timestamps corresponding to video data that is output from the receiver device. The backend clock recovery module may then calculate an input timing difference value by subtracting two sequential analog-source timestamps or digital-source timestamps to thereby define the input timing of a corresponding acquisition unit.
The backend clock recovery module may similarly calculate an output timing difference value by subtracting two appropriate sequential output timestamps to thereby define the output timing of that same corresponding acquisition unit. The backend clock recovery module may then subtract the foregoing input timing difference value from the corresponding output timing difference value to produce a timing error for adjusting the voltage-controlled clock oscillator to thereby optimize timing of the local clock of the receiver device. The present invention thus provides an improved apparatus and method for effectively implementing a unified clock-recovery system.